A semiconductor non-volatile memory cell having a storage capacitor with a ferroelectric comprises a structure as shown in FIG. 6. This memory cell is made by connecting in series a single transfer gate transistor (MOS transistor) T to a storage capacitor (condenser) C having a ferroelectric film. The transfer gate transistor T comprises a polysilicon gate 3 formed on a p-type semiconductor substrate 1 via a gate insulating film 2. Source and drain regions 4 and 5 are high concentration n-type regions formed by self-aligning on the surface side of the p-type semiconductor substrate 1 using the polycrystalline silicon gate 3 as a mask. Moreover, either the source region 4 or the drain region 5 is connected to a bit line, and the polycrystalline silicon gate 3 is connected to a word line, respectively.
The storage capacitor C is constructed on a LOCOS (local oxidized film) 6 as a field oxide film. On the LOCOS 6 and the polycrystalline silicon gate 3 is formed a first interlayer insulating film 7 of SiO.sub.2 by CVD or sputtered SiN. On interlayer insulating film 7, a lower plate electrode 8 of platinum (Pt) is formed above the LOCOS 6 by a sputtering method. On a part of the lower plate electrode 8, a dielectric film 9 is formed. Dielectric film 9 comprises PZT (Pb(Ti.sub.x Zr.sub.y)O.sub.3) as a ferroelectric and is formed by a sputtering method or a spin coat method. On the dielectric film 9 is formed an upper plate electrode 10 of platinum by a sputtering method.
Then, on the first interlayer insulating film 7 is formed a second interlayer insulating film 11 of SiO.sub.2 by CVD or sputtered SIN.sub.2, and on the interlayer insulating film 11 is formed an Al wiring by a sputtering method. The Al wiring 12a is an inner cell wiring for connecting the drain region 5 and the upper plate electrode 10 via a contact hole, and the Al wiring 12b is an earth wiring connecting the lower plate electrode 8 and a pad portion (not shown). Moreover, not shown in FIG. 6, the word line connected to the polycrystalline silicon gate 3 and the bit line connected to the source region 4 are formed using the same Al wiring layer 12. On the Al wirings 12a and 12b is formed a passivation film 13 by sputtering SiN.
PZT (Pb(Ti.sub.x Zr.sub.y)O.sub.3) used as a ferroelectric in the dielectric film 9 has a hysteresis curve to an electric field, and continually maintains residual polarization when a write-in voltage is removed, so as to be utilized as a non-volatile memory as described above. It can also be utilized as a dynamic RAM capacitor because its dielectric constant is about 1000, which is more than two orders of magnitude larger than the SiO.sub.2 film.
However, when exposed to hydrogen, the value of the residual polarization is reduced, and a width (margin) of binary logic necessary for a memory function becomes narrow. Moreover, the value of the dielectric constant is lowered. Such property deterioration results in the lowering of yield, so that it is necessary to consider a film forming method for preventing the dielectric film 9 from exposure to hydrogen after the process of forming the dielectric film 9.
In the formation of SiN by a plasma CVD method and SiO.sub.2 by a normal or reduced pressure CVD method, these films are formed in a hydrogen atmosphere. If they are formed on the upper portion of the dielectric film 9, hydrogen enters into the dielectric film 9 causing deterioration in the film's properties. Thus, these film forming methods cannot be employed. Therefore, in the structure of the above-described prior art non-volatile memory, the second interlayer insulating film 11 and the passivation film 13 are SiN films formed by a sputtering method, since this method emits no hydrogen. 0n the other hand, the passivation film 13 essentially requires a humidity-resisting dense film quality, but the SiN film formed by a sputtering method lacks film denseness. Therefore, it is poor in humidity resistance and is inconvenient as a passivation film.
An object of the present invention is to solve the above problems, and to provide a semiconductor device and a method of manufacturing the same requiring a ferroelectric film having high residual polarization and dielectric constants by employing a method for forming a film over the upper portion of a ferroelectric film to prevent hydrogen from entering into the ferroelectric film.